MC68HC16Z1CAG16 Datasheet, PDF (386/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series users manual

Freescale Semiconductor, Inc.
D.2.12 System Protection Control Register
SYPCR — System Protection Control Register
15
RESET:
NOT USED
8
7
6
SWE SWP
1 MODCLK
5
4
SWT[1:0]
0
0
$YFFA20
3
2
HME BME
1
0
BMT[1:0]
0
0
0
0
This register controls system monitor functions, software watchdog clock prescaling,
and bus monitor timing. This register can be written once following power-on or reset.
Bits [15:8] are unimplemented and will always read zero.
SWE — Software Watchdog Enable
0 = Software watchdog is disabled.
1 = Software watchdog is enabled.
SWP — Software Watchdog Prescaler
This bit controls the value of the software watchdog prescaler.
0 = Software watchdog clock is not prescaled.
1 = Software watchdog clock is prescaled by 512.
The reset value of SWP is the complement of the state of the MODCLK pin during
reset.
SWT[1:0] — Software Watchdog Timing
This field selects the divide ratio used to establish the software watchdog time-out pe-
riod. Refer to Table D-6.
Table D-6 Software Watchdog Divide Ratio
SWP
0
0
0
0
1
1
1
1
SWT[1:0]
00
01
10
11
00
01
10
11
Divide Ratio
2⁹
2¹¹
2¹³
2¹⁵
2¹⁸
2²⁰
2²²
2²⁴
The following equation calculates the time-out period for a slow reference frequency,
where f_ref is equal to the EXTAL crystal frequency.
Time-out Period = ^D-----ⁱ-^v---ⁱ-^d----^e-----^R----^a---^t--ⁱ-^o-----^S----^p----^e---^c---ⁱ-^f--ⁱ-^e----^d-----^b---^y-----^S----^W-----^P------^a---ⁿ----^d-----^S----^W-----^T----^[--¹---^:--⁰---^]
f_ref
The following equation calculates the time-out period for a fast reference frequency,
where f_ref is equal to the EXTAL crystal frequency.
D-12
REGISTER SUMMARY
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M68HC16 Z SERIES
USER’S MANUAL