MC68HC16Z1CAG16 Datasheet, PDF (466/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series users manual

Freescale Semiconductor, Inc.
STAB DDRF
;Port F pins 0-7 as outputs (force 3-7 to 0)
LDAB #$01
LDAA #$00
***** Main Loop *****
START: STAB PORTF0
STAA PORTF0
BRA START
;store counter into Port E data register
;load A register with Port F data register
;go back and start the counting again at zero
***** Exceptions/Interrupts *****
BDM: BGND
;exception vectors point here
;and will put user into background mode
E.2.1.2 Example 2 - Using Chip-Selects
*
Description : Demo of how to set up the U1 and U3 RAM slots with
*
two 32Kx8 RAM chips using the Chip Selects. The new
*
memory will start at address $30000 and will be both
*
byte and word readable/writable.
*
This program assumes that the RAM to be installed
*
(such as MCM60L256AP85 or MCM6206P85) have
*
access times of 85 ns and require no wait states.
*
The DSACK field of the Chip Select Option Registers
*
may need to be adjusted for chips that have faster or
*
slower access times.
****************************************************************************
INCLUDE
addresses
INCLUDE
INCLUDE
'EQUATES.ASM' ;table of EQUates for common register
'ORG00000.ASM' ;initialize reset vector
'ORG00008.ASM' ;initialize exception vector table
ORG
$0200
;start program right after vector table
***** Initialization *****
INIT:
;Initialization stuff.....
INCLUDE
COP
INCLUDE
INCLUDE
'INITSYS.ASM' ;initially set EK=F, XK=0, YK=0, ZK=0
;set sys clock at 16.78 MHz, disable
'INITRAM.ASM'
'INITSCI.ASM'
;turn on 1k internal SRAM at $10000
;set stack in bank 1 (SK=1, SP=03FE)
;set SCI baud rate at 9600 baud
;enable SCI transmitter and receiver
CSINIT:
LDD
STD
STD
LDD
STD
#$0303
CSBAR0
CSBAR1
#$5030
CSOR0
;Initialize the Chip Selects.....
;set U1 RAM base addr to $30000: bank 3, 64k
;set U3 RAM base addr to $30000: bank 3, 64k
;set Chip Select 0, upper byte, write only
E-14
INITIALIZATION AND PROGRAMMING EXAMPLES
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M68HC16 Z SERIES
USER’S MANUAL