MC68HC16Z1CAG16 Datasheet, PDF (198/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series users manual

Freescale Semiconductor, Inc.
8.7.6 Conversion Timing
Total conversion time is made up of initial sample time, transfer time, final sample time,
and resolution time. Initial sample time is the time during which a selected input chan-
nel is connected to the sample buffer amplifier through a sample capacitor. During
transfer time, the sample capacitor is disconnected from the multiplexer, and the RC
DAC array is driven by the sample buffer amp. During final sampling time, the sample
capacitor and amplifier are bypassed, and the multiplexer input charges the RC DAC
array directly. During resolution time, the voltage in the RC DAC array is converted to
a digital value, and the value is stored in the SAR.
Initial sample time and transfer time are fixed at two ADC clock cycles each. Final sam-
ple time can be 2, 4, 8, or 16 ADC clock cycles, depending on the value of the STS
field in ADCTL0. Resolution time is ten cycles for 8-bit conversion and twelve cycles
for 10-bit conversion.
Transfer and resolution require a minimum of 16 ADC clocks (8 µs with a 2.1 MHz ADC
clock) for 8-bit resolution or 18 ADC clocks (9 µs with a 2.1 MHz ADC clock) for 10-bit
resolution. If maximum final sample time (16 ADC clocks) is used, total conversion
time is 15 µs for an 8-bit conversion or 16 µs for a 10-bit conversion (with a 2.1 MHz
ADC clock).
Figures 8-2 and 8-3 illustrate the timing for 8- and 10-bit conversions, respectively.
These diagrams assume a final sampling period of two ADC clocks.
INITIAL
SAMPLE
TIME
1
FINAL
TRANSFER SAMPLE
TIME
TIME
(2 ADC CLOCKS)
RESOLUTION TIME
TRANSFER CONVERSION TO
RESULT REGISTER AND SET
CCF
16
6 CYCLES
SAMPLE AND TRANSFER
PERIOD
2
CYCLES
SAR7
1
1
1
1
1
1
1
1
CYCLE CYCLE CYCLE CYCLE CYCLE CYCLE CYCLE CYCLE
SAR6 SAR5 SAR4 SAR3 SAR2 SAR1 SAR0 EOC
SUCCESSIVE APPROXIMATION
END
SEQUENCE
8-12
CH 1
CH 2
CH 3
CH 4
SCF FLAG SET HERE AND SEQUENCE
ENDS IF IN THE 4-CHANNEL MODE
CH 5
CH 6
CH 7
CH 8
SCF FLAG SET HERE AND SEQUENCE
ENDS IF IN THE 8-CHANNEL MODE
Figure 8-2 8-Bit Conversion Timing
16 ADC 8-BIT TIM 1
ANALOG-TO-DIGITAL CONVERTER
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M68HC16 Z SERIES
USER’S MANUAL