MC68HC16Z1CAG16 Datasheet, PDF (480/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series users manual

Freescale Semiconductor, Inc.
ANDA
BEQ
again
LDAA
STD
TC_LOOP:
LDAB
ANDB
BEQ
RTS
#$01
SEND_CH
#$00
SCDR
SCSR+1
#$80
TC_LOOP
;check only the TDRE flag bit
;if TDR is not empty, go back to check it
;clear A to send a full word to SCDR ($FFC0E)
;transmit one ASCII character to the screen
;test the TC bit (transfer complete)
;continue to wait until TC is set
;finish sending out byte
***** The STRINGS *****
STRING_IC1
DC.W
STRING_IC2
DC.W
STRING_IC3
DC.W
STRING_OC2
DC.W
STRING_PAOV
DC.W
times!',07,0a,0d,00
'Input capture 1 caught a transition',0a,0d,00
'Input capture 2 caught a rising edge',0a,0d,00
'Input capture 3 caught a falling edge',0a,0d,00
0a,'Output compare 2 just toggled',0a,0d,00
0a,'Pulse Accum. has overflowed 10
***** Exceptions/Interrupts *****
*
Note that every one of the GPT interrupt service routines clears
*
its flag bit at the end of the routine before the RTI instruction.
EVEN
IC1_ROUTINE:
LDX
JSR
BCLR
RTI
#STRING_IC1
SEND_STRING
TFLG1,#$01
;execute when IC1 senses a transition
;print the message
;clear the IC1 flag bit
IC2_ROUTINE:
LDX
JSR
BCLR
RTI
#STRING_IC2
SEND_STRING
TFLG1,#$02
;execute when IC2 senses a rising edge
;print the message
;clear the IC2 flag bit
IC3_ROUTINE:
LDX
JSR
BCLR
RTI
#STRING_IC3
SEND_STRING
TFLG1,#$04
;execute when IC3 senses a falling edge
;print the message
;clear the IC3 flag bit
OC2_ROUTINE:
LDX
JSR
BCLR
RTI
#STRING_OC2
SEND_STRING
TFLG1,#$10
;execute when OC2 does a toggle
;print the message
;clear the OC2 flag bit
PAOV_ROUTINE:
min
;execute on Pulse Accumulator Counter overflow
;if PAI pin tied PWMA, bell approx every 5 sec
;if PAI pin tied PWMB, bell approx every 10
E-28
INITIALIZATION AND PROGRAMMING EXAMPLES
For More Information On This Product,
Go to: www.freescale.com
M68HC16 Z SERIES
USER’S MANUAL