MC68HC16Z1CAG16 Datasheet, PDF (19/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series users manual

Figure
Freescale Semiconductor, Inc.
LIST OF ILLUSTRATIONS
(Continued)
Title
Page
10-6 SCI Receiver Block Diagram ...................................................................... 10-15
11-1
11-2
11-3
11-4
11-5
11-6
GPT Block Diagram ...................................................................................... 11-2
Prescaler Block Diagram .............................................................................. 11-9
Capture/Compare Unit Block Diagram ....................................................... 11-11
Input Capture Timing Example ................................................................... 11-13
Pulse Accumulator Block Diagram ............................................................. 11-15
PWM Block Diagram .................................................................................. 11-17
A-1
A-2
A-3
A-4
A-5
A-6
A-7
A-8
A-9
A-10
A-11
A-12
A-13
A-14
A-15
A-16
A-17
A-18
A-19
A-20
A-21
A-22
A-23
A-24
A-25
A-26
A-27
A-28
A-29
A-30
A-31
A-32
CLKOUT Output Timing Diagram .................................................................A-28
External Clock Input Timing Diagram ...........................................................A-28
ECLK Output Timing Diagram ......................................................................A-28
Read Cycle Timing Diagram ........................................................................A-29
Write Cycle Timing Diagram .........................................................................A-30
Fast Termination Read Cycle Timing Diagram ............................................A-31
Fast Termination Write Cycle Timing Diagram .............................................A-32
Bus Arbitration Timing Diagram — Active Bus Case ...................................A-33
Bus Arbitration Timing Diagram — Idle Bus Case .......................................A-34
Show Cycle Timing Diagram ........................................................................A-35
Chip-Select Timing Diagram ........................................................................A-36
Reset and Mode Select Timing Diagram ......................................................A-36
Background Debug Mode Timing Diagram (Serial Communication) ............A-39
Background Debug Mode Timing Diagram (Freeze Assertion) ....................A-39
ECLK Timing Diagram ..................................................................................A-44
QSPI Timing — Master, CPHA = 0 ..............................................................A-47
QSPI Timing — Master, CPHA = 1 ..............................................................A-47
QSPI Timing — Slave, CPHA = 0 ................................................................A-48
QSPI Timing — Slave, CPHA = 1 ................................................................A-48
SPI Timing — Master, CPHA = 0 .................................................................A-51
SPI Timing — Master, CPHA = 1 .................................................................A-51
SPI Timing — Slave, CPHA = 0 ...................................................................A-52
SPI Timing — Slave, CPHA = 1 ...................................................................A-52
Input Signal Conditioner Timing ...................................................................A-53
Pulse Accumulator — Event Counting Mode (Leading Edge) ......................A-54
Pulse Accumulator — Gated Mode (Count While Pin High) ........................A-55
Pulse Accumulator — Using TOF as Gated Mode Clock .............................A-56
PWMx (PWMx Register = 01, Fast Mode) ...................................................A-56
Output Compare (Toggle Pin State) .............................................................A-57
Input Capture (Capture on Rising Edge) ......................................................A-58
General-Purpose Input .................................................................................A-59
General-Purpose Output (Causes Input Capture) ........................................A-60
M68HC16 Z SERIES
USER’S MANUAL
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