MC68HC16Z1CAG16 Datasheet, PDF (258/500 Pages) Freescale Semiconductor, Inc – M68HC16Z Series users manual

Freescale Semiconductor, Inc.
10.4.5.2 Serial Formats
All data frames must have a start bit and at least one stop bit. Receiving and transmit-
ting devices must use the same data frame format. The SCI provides hardware sup-
port for both 10-bit and 11-bit frames. The M bit in SCCR1 specifies the number of bits
per frame.
The most common data frame format for NRZ serial interfaces is one start bit, eight
data bits (LSB first), and one stop bit; a total of ten bits. The most common 11-bit data
frame contains one start bit, eight data bits, a parity or control bit, and one stop bit.
Ten-bit and eleven-bit frames are shown in Table 10-6.
Start
1
1
1
Start
1
1
Table 10-6 Serial Frame Formats
10-Bit Frames
Data
Parity/Control
7
—
7
1
8
—
11-Bit Frames
Data
Parity/Control
7
1
8
1
Stop
2
1
1
Stop
2
1
10.4.5.3 Baud Clock
The SCI baud rate is programmed by writing a 13-bit value to the SCBR field in SCI
control register zero (SCCR0). The baud rate is derived from the MCU system clock
by a modulus counter. Writing a value of zero to SCBR[12:0] disables the baud rate
generator. Baud rate is calculated as follows:
SCI Baud Rate = _{3----2-----×}----S----C-f--^s--B-^y--^s-R----[--1---2---:--0----]
or
SCBR[12:0] = _{3----2-----×}----S----C-----I---B----a---u--f--^s_d--^y--^s-R----a---t--e-----D----e----s---i-r--e---d--
where SCBR[12:0] is in the range {1, 2, 3, ..., 8191}.
The SCI receiver operates asynchronously. An internal clock is necessary to synchro-
nize with an incoming data stream. The SCI baud rate generator produces a receive
time sampling clock with a frequency 16 times that of the SCI baud rate. The SCI de-
termines the position of bit boundaries from transitions within the received waveform,
and adjusts sampling points to the proper positions within the bit period.
10-18
MULTICHANNEL COMMUNICATION INTERFACE
For More Information On This Product,
Go to: www.freescale.com
M68HC16 Z SERIES
USER’S MANUAL