MCIMX27 Datasheet, PDF (47/1650 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor

Introduction to the i.MX27 Multimedia Applications Processor
Mbps 802.3 Media Independent Interface (MII). It requires an external transceiver (PHY) to complete the
interface to the media. The FEC provides the following features:
• Supports three different Ethernet physical interfaces:
— 100 Mbps IEEE 802.3 MII
— 10 Mbps IEEE 802.3 MII
— 10 Mbps 7-wire interface (industry standard)
• IEEE 802.3 full-duplex flow control
• Programmable maximum frame length supports IEEE 802.1 VLAN tags and priority
• Supports full-duplex operation (200 Mbps throughput) with a minimum system clock rate of
50 MHz
• Supports half-duplex operation (100 Mbps throughput) with a minimum system clock rate of
25 MHz
• Retransmission from transmit FIFO following a collision (no processor bus utilization)
• Automatic internal flushing of the receive FIFO for runts (collision fragments) and address
recognition rejects (no processor bus utilization)
• Address recognition
— Frames with broadcast address may be always accepted or always rejected
— Exact match for single 48-bit individual (unicast) address
— Hash (64-bit hash) check of individual (unicast) addresses
— Hash (64-bit hash) check of group (multicast) addresses
— Promiscuous mode
1.2.8 External Memory Interface
The External Memory Interface (EMI) of the i.MX27 processor consists of the SDRAM controller
(SDRAMC), the PCMCIA controller, the NAND Flash controller (NFC), and the External Interface
module (EIM), using the Multi-Master Memory Interface (M3IF) as the controller through the external
memory ports. The individual features of these controllers are provided in this section.
To allow the maximum number of potential designs, the EMI supports the following memory types:
• SDRAM—133 MHz, 32/16-bit
• DDR—266 MHz, 32/16-bit
• NAND Flash—dedicated 8-bit, shared 16-bit
• PSRAM
1.2.8.1 Multi-Master Memory Interface (M3IF)
The Multi-Master Memory Interface (M3IF) controls memory accesses from one or more masters through
different port interfaces to the external memory controllers SDRAM, PCMCIA, NAND Flash, and EIM.
The M3IF includes these distinctive features:
• Supports multiple requests from masters through input port interfaces
MCIMX27 Multimedia Applications Processor Reference Manual, Rev. 0.2
Freescale Semiconductor
1-13