MCIMX27 Datasheet, PDF (1596/1650 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor

Liquid Crystal Display Controller (LCDC)
Table 43-14. LCDC Panel Configuration Register Field Descriptions
Field
Description
31
TFT
30
COLOR
29–28
PBSIZ
27–25
BPIX
24
PIXPOL
23
FLMPOL
22
LPPOL
21
CLKPOL
20
OEPOL
Interfaces to TFT Display. Controls the format and timing of output control signals. Active and passive displays
use different signal timing formats as described in Section 43.2.9, “Panel Interface Signals and Timing.” TFT
also controls the use of FRC in color mode.
0 LCD panel is a Passive display
1 LCD panel is an Active display: “digital CRT” signal format, FRC is bypassed.
0 0 Monochrome
0 1 CSTN
1 0–
1 1 TFT
Interfaces to Color Display. Activates 3 channels of FRC in passive mode to allow the use of special 2 2/3 pixels
per output vector format.
0 LCD panel is a Monochrome display.
1 LCD panel is a Color display.
0 0 Monochrome
0 1 CSTN
1 0–
1 1 TFT
Panel Bus Width. Specifies the panel bus width. Applicable for monochrome monitors. For passive color panels,
only 8-bit panel bus width is supported.
00 1-bit
10 4-bit
11 8-bit
Bits Per Pixel. Indicates the number of bits per pixel in memory.
000 1 bpp, FRC bypassed
001 2 bpp
010 4 bpp
011 8 bpp
100 12 bpp (16-bits of memory used)
101 16 bpp
110 18bpp (32-bits of memory used)
111 Reserved
Note: To set normal 18bpp mode: BPIX = 110, END_SEL = 0 and SWAP_SEL = X (don’t care)
To set Microsoft PAL_BGR 18bpp mode: BPIX = 110, END_SEL = 1 and SWAP_SEL = 1
Pixel Polarity. Sets the pixels polarity.
0 Active High
1 Active Low
First Line Marker Polarity. Sets the polarity of first line marker symbol.
0 Active High
1 Active Low
Line Pulse Polarity. Sets the polarity of line pulse signal.
0 Active High
1 Active Low
LCD Shift Clock Polarity. Sets the polarity of active edge of LCD shift clock.
0 Active Negative edge of LSCLK (in TFT mode, Active on Positive edge of LSCLK)
1 Active Positive edge of LSCLK (in TFT mode, Active on Negative edge of LSCLK)
Output Enable Polarity. Sets the output enable signal polarity.
0 Active High
1 Active Low
43-30
MCIMX27 Multimedia Applications Processor Reference Manual, Rev. 0.2
Freescale Semiconductor