MCIMX27 Datasheet, PDF (1272/1650 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor

AHB-Lite IP Interface (AIPI) Module
Table 35-5. i.MX21 AIPI Peripheral Access Sizes and IP Access Types (continued)
Location
4
5
6
7
8
9
10-17
18-29
Peripheral
USB OTG
USB OTG
EMMA
CRM
FIRI
Reserved
Reserved
Unoccupied
PSR[1] PSR[0]
1
0
1
0
1
0
1
0
1
0
—
—
1
0
1
1
Data Bus
Width
32-bit
32-bit
32-bit
32-bit
32-bit
—
32-bit
—
16-bit
8-bit
Read
N
N
N
Y
Y
—
N
N
Write
N
N
N
Y
Y
—
N
N
Read
Y
N
N
Y
Y
—
N
N
Write
Y
N
N
Y
Y
—
N
N
35.3 Interface Timing
This section describes AIPI interface timing characteristics.
35.3.1 Read Cycles
Two clock read accesses are possible with the AIPI when the requested access size is equal to or smaller
than the size of the targeted IP bus peripheral. If the requested access size is larger than that of the targeted
IP bus peripheral (for example, a 32-bit access to a 16 bit peripheral) then a minimum of three clocks are
required to complete the access.
35.3.2 Write Cycles
Three clock write accesses are possible with the AIPI when the requested access size is equal to or smaller
than the size of the targeted IP bus peripheral. If the requested access size is larger than that of the targeted
IP bus peripheral (for example, a 32-bit access to a 16 bit peripheral) then a minimum of four clocks are
required to complete the access.
35.3.3 Aborted Cycles
The AIPI follows a standard procedure when a cycle is aborted and the abort is initiated by the AIPI itself
or the targeted IP bus peripheral. The AIPI either fails to initiate or immediately terminates any IP bus
activity that is ongoing.
There are several conditions that can cause the AIPI to abort the current operation and report an error. The
first is the case in which the targeted IP bus peripheral asserts its internal error signal. In this case the AIPI
immediately terminates access to the targeted IP bus peripheral. Whether the current IP bus access is a
multi-cycle access or a single cycle access has no bearing on the behavior of the AIPI. The AIPI responds
identically in both cases.
35-6
MCIMX27 Multimedia Applications Processor Reference Manual, Rev. 0.2
Freescale Semiconductor