MCIMX27 Datasheet, PDF (428/1650 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor

Multi-Master Memory Interface (M3IF)
The number and type of ports in use is system dependent, and the unused ports will be unconnected at the
system level. Each one of the MPG gaskets communicates with a single master, through one of the (two)
defined port interfaces/protocols.
16.4.1.1 Overview of MPG Operation
MPG port gasket is used for those system masters that are 32-bit ARM9 AHB lite bus compliant. MPG
port gasket appears as another slave to any master it connects to. Table 16-13 lists the access types
supported by the MPG.
Table 16-13. MPG Supported Burst Accesses
HBURST
000
001
010
011
100
101
110
111
TYPE
SINGLE
INCR
WRAP 4
INCR 4
WRAP 8
INCR 8
WRAP 16
INCR 16
ESDCTL
32-bit
YES
YES
YES
YES
YES
YES
NO
NO
M3IF SLAVES
EIM
32-bit
NFC
16/32-bit
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
NO
YES
NO
YES
NO
YES
PCMCIA
8/16-bit
YES
YES
YES
YES
YES
YES
YES
YES
NOTE
Unsupported access types will produce undefined behavior but an error
response will not be generated.
Figure 16-11 shows MPG port interface diagram. The interface is ARM 11 AMBA-AHB lite compliant
(does not support RETRY and SPLIT transfers). MPG works with both M3A and MAB, and output
AHB_BUS and CONTROL signals to/from M3A (including request to ESDCTL/MDDRC signal and
request to non-ESDCTL/MDDRC = general signal). MPG decodes AHB bus inputs and convert them to
MAB_CONTROL bus, which includes ADDR, DATA and CONTROL signals (like suspend and abort
commands).
Once an accesses is initiated by one of the M3IF masters, the access reaches the respective MPG. The MPG
asserts the request signal toward the M3A which starts the arbitration process. Once the arbitration is
completed and the request can gain access to the bus, the request is accepted by the MPG and the
handshake between the MPG and the M3A is completed for that access. If the access was not targeted
toward the ESDCTL, the master can start the access (by passing the master AHB bus) toward the
respective slave (NFC, EIM).
If initiated access is targeted to the ESDCTL after M3A arbitration process is completed, the request is
transferred toward the MAB, which arbitrates and schedules the access toward the ESDCTL as a function
of ESDCTL state. An internal handshake between the MAB and ESDCTL is used to schedule the new
16-18
MCIMX27 Multimedia Applications Processor Reference Manual, Rev. 0.2
Freescale Semiconductor