MCIMX27 Datasheet, PDF (407/1650 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor

External Memory Interface (EMI)
Table 15-3. EMI Signal Properties (continued)
Name
Port
Function
Reset State
SDCTL_CSD0_SEL_B
SDCTL_CSD1_SEL_B
NF16_BOOT_B
NF8_BOOT_B
NF_16BIT_SEL
NFC_HCLK
NFC_RD_OE
NFC_WR_OE
IPP_IND_FLASH_CLK
IPP_IND_NFC_RB_IN
WEIM_BOOT_CFG[3:0]
IPP_IND_WEIM_ECB_B
WEIM_HCLK
IPP_IND_WEIM_DTACK_B
IPP_IND_CD_B_I[1:0]
IPP_IND_VS_I[1:0]
IPP_IND_BVD1_STSCH_B_I
IPP_IND_BVD2_SPKR_I
IPP_IND_PWR_ON_I
IPP_IND_RDY_IRQ_B_I
IPP_IND_WP_I
IPP_IND_RESETB
HRESET_HCLK_B
IPP_IND_NFC_READ_DATA_IN[
15:0]
IPP_IND_EMI_DATA_IN[31:0]
I SDRAM/MDDR CSD0 select multiplexed with CS2 (configurable via
0
the system control register, FMCR)
I SDRAM/MDDR CSD1 select multiplexed with CS3 (configurable via
0
the system control register, FMCR)
NFC Inputs
I
Boot mode source is 16 bit NAND Flash memory.
application
dependent
I
Boot mode source is 8 bit NAND Flash memory.
application
dependent
I
16 bit NAND Flash memory is use indication.
0
I
NFC AHB input clock
0
I
NFC read output enable — controls the direction of data bus
0
I
NFC write output enable — controls the direction of data bus
0
I
NAND Flash side clock with period of 40nS
0
I
NFC in NF_RB
0
WEIM Inputs
I
WEIM BootMode select (from CCM)
application
“101” - 16 bit CS0 at D[15:0]
dependent
I
WEIM End Current Burst
1
I
WEIM AHB input clock
0
I
External DTACK acknowledge
1
PCMCIA Inputs
I
CD[1:0] signals from card
3
I
VS[1:0] signals from card
0
I
BVD1/STSCHG signals from card
0
I
BVD2/SPKR signals from card
0
I
POWER_ON signals from card/board
0
I
READY/IRQ_B signals from card
1
I
WP signals from card
1
Global Inputs
I
Reset signal
1
I
Reset signal
1
I External memories (non SDRAM) read data in from I/O MUX/PADS
0
I
EMI SDRAM/DDR data in from I/O MUX/PADS
0
MCIMX27 Multimedia Applications Processor Reference Manual, Rev. 0.2
Freescale Semiconductor
15-27