MCIMX27 Datasheet, PDF (1389/1650 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor

Chapter 40
Video Codec (Video_Codec)
The Video Codec module is the multimedia video processing module in the i.MX27 device. Figure 40-1
shows the top-level diagram for Video Codec.
IP bus
Video
Codec APB bus
Gasket
APB3 I/F
BIT
Processor
Core
Host I/F
Internal per
bus interface
H/W accelerator for
bitstream
packing/unpacking
Program Mem
Data Mem
AXI bus I/F
Reset
Controller
MPEG4
H.263P3
H.264
shared
Main controller
(Macroblock Sequencer)
AHB bus
AHB bus
AHB bus
Video
Codec
Gasket
AXI Bus
DMAC
Rotation
(source image)
AHB bus for search RAM
Motion
Estimation
Cur Mem
Internal Peripheral Bus
Internal AXI Bus
Inter
Prediction
Intra
Prediction
Coefficient
Buffer
DMAC
deblock filter and
Rotation
(decoded image)
residual
Reconstruction
Video Codec Processor
AVC
Transform/
Quant
MPEG
Transform/
Quant
AC/DC
Prediction
Figure 40-1. Video Codec Block Architecture Diagram
40.1 Features
Video Codec module support following multimedia video stream processing features:
• Multi-standard video codec
— MPEG-4 part-II simple profile encoding/decoding
— H.264/AVC baseline profile encoding/decoding
— H.263 P3 encoding/decoding
— Multi-party call: max processing 4 image/bitstream encoding and/or decoding simultaneously.
MCIMX27 Multimedia Applications Processor Reference Manual, Rev. 0.2
Freescale Semiconductor
40-1