MCIMX27 Datasheet, PDF (1356/1650 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processor

Digital Audio MUX (AUDMUX)
Table 38-4. Host Port Configuration Register Field Descriptions (continued)
Field
Description
8
INMEN
Internal Network Mode Enable. RxD from ports in internal network mode are ANDed together.
RXDSEL is ignored. INMMASK determines which RxD signals are ANDed together.
When internal network mode is enabled at Port 3, then RXDSEL3[3:0] for TxDn_obe selection
is ignored and TxD_obe is always driven high. That is, asserted for all timeslots. This places
a restriction on slave devices connected in external network mode such that these slave
devices have all to be disabled. See Figure 38-16.
0 Disable
1 Enable internal network mode
7–0
INMMASK
Internal Network Mode Mask. Bit mask that selects which of the RxD signals from ports are
to be ANDed together for internal network mode. Bit 7 represents RxD from Port 8 and Bit 0
represents RxD from Port 1.
Note: Bit in self port position should be set as 1.
0 Include RxDn for ANDing.
1 Excludes the RxDn from ANDing.
38.11.4 Peripheral Port Configuration Registers (PPCR1–2)
There is one Peripheral Port Configuration Register (PPCR) for each peripheral port.
0x1001_6010 (PPCR1)
0x1001_6014 (PPCR2)
0x1001_601C (PPCR3)
31
30
29
28
27
26
R _{TFS TCLK}
W ^{DIR DIR}
TFCSEL
Reset 0
0
0
0
0
0
25
24
23
RFS RCLK
DIR DIR
0
0
0
Access: User read/write
22
21
20
19
18
17
16
RFCSEL
0
0
00
0
0
0
0
0
00
15
14
13
12
11
10
9
8
7
R
RXDSEL
W
SYN
0
0
0
TXRXEN
6
5
4
3
2
1
0
0
0
0
0
0
00
Reset 0
0
0
1
0
0
0
0
0
0
0
0
0
0
00
Figure 38-11. Peripheral Port Configuration Registers (PPCR1–2)
38-18
MCIMX27 Multimedia Applications Processor Reference Manual, Rev. 0.2
Freescale Semiconductor