MC68HC08JB1 Datasheet, PDF (36/216 Pages) Motorola, Inc – Microcontrollers

Addr.
Register Name
Bit 7
$0000
Read:
Port A Data Register
(PTA)
Write:
Reset:
PTA7
Read:
$0001
Unimplemented Write:
Reset:
$0002
Read: 0
Port C Data Register
(PTC)
Write:
Reset:
$0003
Read: 0
Port D Data Register
(PTD)
Write:
Reset:
Read:
$0004
Data Direction Register A
(DDRA)
Write:
Reset:
DDRA7
0*
* DDRA7 bit is reset by POR or LVI reset only.
Read:
$0005
Unimplemented Write:
Reset:
Read: 0
$0006
Data Direction Register C
(DDRC)
Write:
Reset: 0
Read: 0
$0007
Data Direction Register D
(DDRD)
Write:
Reset: 0
$0008
Read: 0
Port E Data Register
(PTE)
Write:
Reset:
Read: 0
$0009
Data Direction Register E
(DDRE)
Write:
Reset: 0
6
PTA6
5
PTA5
0
0
0
0
DDRA6 DDRA5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented
4
3
PTA4 PTA3
Unaffected by reset
2
PTA2
1
PTA1
Bit 0
PTA0
0
0
0
0
PTC0
Unaffected by reset
0
0
0
PTD1 PTD0
Unaffected by reset
DDRA4 DDRA3 DDRA2 DDRA1 DDRA0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PTE4 PTE3
Unaffected by reset
0
DDRE4 DDRE3
0
0
0
R = Reserved
0
DDRC0
0
0
DDRD1 DDRD0
0
0
0
PTE1
0
DDRE1
0
0
U = Unaffected by reset
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 8)
Technical Data
36
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor