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MC68HC08JB1 Datasheet, PDF (114/216 Pages) Motorola, Inc – Microcontrollers
tPeriod
DIFFERENTIAL
DATA LINES
JITTER
CROSSOVER
POINTS
CONSECUTIVE
TRANSITIONS
PAIRED
TRANSITIONS
Figure 9-13. Data Jitter
For low-speed transmissions, the jitter time for any consecutive
differential data transitions must be within ±25ns and within ±10ns for
any set of paired differential data transitions. These jitter numbers
include timing variations due to differential buffer delay, rise/fall time
mismatches, internal clock source jitter, noise and other random effects.
9.7.2.5 Data Signal Rise and Fall Time
The output rise time and fall time are measured between 10% and 90%
of the signal. Edge transition time for the rising and falling edges of
low-speed signals is 75ns (minimum) into a capacitive load (CL) of
200pF and 300ns (maximum) into a capacitive load of 600pF. The rising
and falling edges should be transitioning (monotonic) smoothly when
driving the cable to avoid excessive EMI.
+ CL DIFFERENTIAL
DATA LINES
+
CL
RISE TIME
90%
10%
tR
FALL TIME
90%
10%
tF
LOW SPEED: 75ns at CL = 200pF, 300ns at CL = 600 pF
Figure 9-14. Data Signal Rise and Fall Time
Technical Data
114
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor