MC68HC08JB1 Datasheet, PDF (169/216 Pages) Motorola, Inc – Microcontrollers

PTC0 — Port C Data Bit-0
This read/write bit is software-programmable. Data direction is under
the control of the DDRC0 bit in data direction register C. Reset has no
effect on PTC0 data.
The port C pullup enable bit, PCP, in the port option control register
(POCR) enables the pullup on PTC0 if the pin is configured as an
input. (See 11.7 Port Options.)
11.4.2 Data Direction Register C
Data direction register C determines whether PTC0 pin is an input or an
output. Writing a logic 1 to DDRC0 bit enables the output buffer for the
PTC0 pin; a logic 0 disables the output buffer.
Address: $0006
Bit 7
6
5
4
3
2
1
Read: 0
0
0
0
0
0
0
Write:
Reset: 0
0
0
0
0
0
0
Figure 11-6. Data Direction Register C (DDRC)
Bit 0
DDRC0
0
DDRC0 — Data Direction Register C Bit-0
This read/write bit control PTC0 data direction. Reset clears DDRC0,
configuring PTC0 pin as an input.
1 = PTC0 pin configured as output
0 = PTC0 pin configured as input
NOTE: Avoid glitches on PTC0 pin by writing to the port C data register before
changing DDRC0 bit from 0 to 1.
Figure 11-7 shows the port C I/O logic.
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor
Technical Data
169