MC68HC08JB1 Datasheet, PDF (176/216 Pages) Motorola, Inc – Microcontrollers

When bit DDREx is a logic 1, reading address $0008 reads the PTEx
data latch. When bit DDREx is a logic 0, reading address $0008 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 11-3 summarizes
the operation of the port E pins.
Table 11-5. Port E Pin Functions
DDRE
Bit
0
1
PTE
Bit
PTE4
PTE3
PTE1
PTE4
PTE3
PTE1
I/O Pin Mode
Accesses
to DDRE
Read/Write
Input, Hi-Z⁽¹⁾
DDRE4
DDRE3
DDRE1
Output
DDRE4
DDRE3
DDRE1
Accesses to PTE
Read
Pin
PTE4
PTE3
PTE1
Write
PTE4⁽²⁾
PTE3
PTE1
PTE4
PTE3
PTE1
NOTES:
1. Hi-Z = high impedance
2. Writing affects data register, but does not affect input.
Technical Data
176
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor