MC68HC08JB1 Datasheet, PDF (200/216 Pages) Motorola, Inc – Microcontrollers

14.4.5 Internal Reset
An internal reset clears the SIM counter and the COP counter.
14.4.6 Reset Vector Fetch
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
14.4.7 COPD (COP Disable)
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register (CONFIG).
14.4.8 COPRS (COP Rate Select)
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register (CONFIG).
Address: $001F
Bit 7
Read: 0
Write:
6
5
4
3
2
1
0
URSTD LVID SSREC COPRS STOP
Reset: 0
0
0
0
0
0
0
= Unimplemented
Figure 14-2. Configuration Register (CONFIG)
Bit 0
COPD
0
Technical Data
200
COPRS — COP Rate Select Bit
COPRS selects the COP timeout period. Reset clears COPRS.
1 = COP timeout period is (2¹³ – 2⁴) × OSCXOUT cycles
0 = COP timeout period is (2¹⁸ – 2⁴) × OSCXOUT cycles
COPD — COP Disable Bit
COPD disables the COP module.
1 = COP module disabled
0 = COP module enabled
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor