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MC68HC08JB1 Datasheet, PDF (194/216 Pages) Motorola, Inc – Microcontrollers | |||
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Address: $0016
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
KEYF
0
IMASKK MODEK
Write:
ACKK
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 13-2. Keyboard Status and Control Register (KBSCR)
Bits 7â4 â Not used
These read-only bits always read as logic 0s.
KEYF â Keyboard Flag Bit
This read-only bit is set when a keyboard interrupt is pending. Reset
clears the KEYF bit.
1 = Keyboard interrupt pending
0 = No keyboard interrupt pending
ACKK â Keyboard Acknowledge Bit
Writing a logic 1 to this write-only bit clears the keyboard interrupt
request. ACKK always reads as logic 0. Reset clears ACKK.
IMASKK â Keyboard Interrupt Mask Bit
Writing a logic 1 to this read/write bit prevents the output of the
keyboard interrupt mask from generating interrupt requests. Reset
clears the IMASKK bit.
1 = Keyboard interrupt requests masked
0 = Keyboard interrupt requests not masked
MODEK â Keyboard Triggering Sensitivity Bit
This read/write bit controls the triggering sensitivity of the keyboard
interrupt pins. Reset clears MODEK.
1 = Keyboard interrupt requests on falling edges and low levels
0 = Keyboard interrupt requests on falling edges only
Technical Data
194
MC68HC08JB1 â Rev. 2.1
Freescale Semiconductor
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