MC68HC08JB1 Datasheet, PDF (168/216 Pages) Motorola, Inc – Microcontrollers

When bit DDRAx is a logic 1, reading address $0000 reads the PTAx
data latch. When bit DDRAx is a logic 0, reading address $0000 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 11-2 summarizes
the operation of the port A pins.
Table 11-2. Port A Pin Functions
DDRA
Bit
0
1
PTA Bit
X⁽¹⁾
X
I/O Pin Mode
Accesses
to DDRA
Read/Write
Input, Hi-Z^{(2) DDRA[7:0]}
Output
DDRA[7:0]
Accesses to PTA
Read
Pin
PTA[7:0]
Write
PTA[7:0]⁽³⁾
PTA[7:0]
NOTES:
1. X = don’t care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.
11.4 Port C
Port C is an 1-bit general-purpose bidirectional I/O port with software
configurable pullup and current drive options.
11.4.1 Port C Data Register
The port C data register contains a data latch for the PTC0 pin.
Address: $0002
Bit 7
6
5
4
3
2
1
Read: 0
0
0
0
0
0
0
Write:
Reset:
Unaffected by reset
Additional
Function:
Figure 11-5. Port C Data Register (PTC)
Bit 0
PTC0
Optional
pullup
Technical Data
168
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor