MC68HC08JB1 Datasheet, PDF (158/216 Pages) Motorola, Inc – Microcontrollers

10.9.4 TIM Channel Status and Control Registers
Each of the TIM channel status and control registers does the following:
• Flags input captures and output compares
• Enables input capture and output compare interrupts
• Selects input capture, output compare, or PWM operation
• Selects high, low, or toggling output on output compare
• Selects rising edge, falling edge, or any edge as the active input
capture trigger
• Selects output toggling on TIM overflow
• Selects 0% and 100% PWM duty cycle
• Selects buffered or unbuffered output compare/PWM operation
TSC0 Address: $0010
Bit 7
6
Read: CH0F
Write: 0
CH0IE
Reset: 0
0
5
MS0B
0
4
MS0A
0
3
2
ELS0B ELS0A
0
0
1
Bit 0
TOV0 CH0MAX
0
0
TSC1 Address: $0013
Bit 7
6
5
4
3
2
1
Bit 0
Read: CH1F
0
CH1IE
MS1A ELS1B ELS1A TOV1 CH1MAX
Write: 0
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 10-7. TIM Channel Status and Control Registers
(TSC0:TSC1)
Technical Data
158
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor