MC68HC08JB1 Datasheet, PDF (125/216 Pages) Motorola, Inc – Microcontrollers

STALL2 — Endpoint 2 Force Stall Bit
This read/write bit causes endpoint 2 to return a STALL handshake
when polled by either an IN or OUT token by the USB host controller.
Reset clears this bit.
1 = Send STALL handshake
0 = Default
TX2E — Endpoint 2 Transmit Enable
This read/write bit enables a transmit to occur when the USB host
controller sends an IN token to endpoint 2. The appropriate endpoint
enable bit, ENABLE2 bit in the UCR3 register, also should be set.
Software should set the TX2E bit when data is ready to be
transmitted. It must be cleared by software when no more data needs
to be transmitted.
If this bit is 0 or the TXD2F is set, the USB will respond with a NAK
handshake to any endpoint 2 directed IN tokens. Reset clears this bit.
1 = Data is ready to be sent
0 = Data is not ready. Respond with NAK
TP2SIZ3–TP2SIZ0 — Endpoint 2 Transmit Data Packet Size
These read/write bits store the number of transmit data bytes for the
next IN token request for endpoint 2. These bits are cleared by reset.
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor
Technical Data
125