MC68HC08JB1 Datasheet, PDF (160/216 Pages) Motorola, Inc – Microcontrollers

When ELSxB:ELSxA = 0:0, this read/write bit selects the initial output
level of the TCHx pin. (See Table 10-3.). Reset clears the MSxA bit.
1 = Initial output level low
0 = Initial output level high
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIM status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port E, and pin PTEx/TCHx is available as a general-purpose I/O
pin. Table 10-3 shows how ELSxB and ELSxA work. Reset clears the
ELSxB and ELSxA bits.
Table 10-3. Mode, Edge, and Level Selection
MSxB
X
X
0
0
0
0
0
0
1
1
1
MSxA ELSxB ELSxA Mode
Configuration
0
0
0
Pin under port control;
Output ^{initial output level high}
1
0
0
Preset
Pin under port control;
initial output level low
0
0
1
Capture on rising edge only
0
1
0
Input
Capture
Capture on falling edge only
0
1
1
Capture on rising or falling edge
1
0
1
Output ^{Toggle output on compare}
1
1
0
Compare Clear output on compare
1
1
1
or PWM _{Set output on compare}
X
0
1
Buffered Toggle output on compare
X
1
0
Output
Compare or
Clear output on compare
X
1
1
Buffered
PWM
Set output on compare
Technical Data
160
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor