MC68HC08JB1 Datasheet, PDF (142/216 Pages) Motorola, Inc – Microcontrollers

10.2 Introduction
This section describes the timer interface module (TIM2, Version B). The
TIM is a 2-channel timer that provides a timing reference with input
capture, output compare, and pulse-width-modulation functions.
Figure 10-1 is a block diagram of the TIM.
NOTE: TCH1 and TCLK pins are not available on this timer.
10.3 Features
Features of the TIM include:
• input capture/output compare channel
– Rising-edge, falling-edge, or any-edge input capture trigger
– Set, clear, or toggle output compare action
• Buffered and unbuffered pulse width modulation (PWM) signal
generation
• Programmable TIM clock input
– 7-frequency internal bus clock prescaler selection
• Free-running or modulo up-count operation
• Toggle any channel pin on overflow
• TIM counter stop and reset bits
10.4 Pin Name Conventions
The TIM share three I/O pins with three port E I/O pins. The full name of
the TIM I/O pin is listed in Table 10-1. The generic pin name appear in
the text that follows.
Table 10-1. TIM Pin Name Conventions
TIM Generic Pin Names:
Full TIM Pin Names:
TCLK
Not available
TCH0
PTE1/TCH0
TCH1
Not available
Technical Data
142
MC68HC08JB1 — Rev. 2.1
Freescale Semiconductor