XRT74L74 Datasheet, PDF (271/498 Pages) Exar Corporation – 4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
ADVANCED CONFIDENTIAL
XRT74L74
REV. P1.1.1
the Receive Overhead Data Output Interface block)
then it is expected to do the following:
1. Sample the state of the RxOHFrame signal (e.g.,
the Rx_Start_of_Frame input signal) on the rising
edge of the RxOHClk (e.g., the
DS3_OH_Clock_In) signal.
2. Keep track of the number of rising clock edges
that have occurred in the RxOHClk (e.g., the
DS3_OH_Clock_In) signal, since the last time the
RxOHFrame signal was sampled "High". By
doing this, the Terminal Equipment will be able to
keep track of which overhead bit is being output
via the RxOH output pin. Based upon this infor-
mation, the Terminal Equipment will be able to
derive some meaning from these overhead bits.
Table 58 relates the number of rising clock edges (in
the RxOHClk signal, since the RxOHFrame signal
was last sampled "High") to the DS3 Overhead bit
that is being output via the RxOH output pin.
TABLE 58: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN RXOHCLK, (SINCE
RXOHFRAME WAS LAST SAMPLED "HIGH") TO THE DS3 OVERHEAD BIT, THAT IS BEING OUTPUT VIA THE RXOH
OUTPUT PIN
NUMBER OF RISING CLOCK EDGES IN RXOHCLK
0 (Clock edge is coincident with RxOHFrame being detected "High")
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
THE OVERHEAD BIT BEING OUTPUT BY THE
XRT74L74
X
F1
AIC
F0
NA
F0
FEAC
F1
X
F1
UDL
F0
UDL
F0
UDL
F1
P
F1
CP
F0
CP
F0
CP
F1
P
F1
FEBE
F0
FEBE
F0
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