XRT74L74 Datasheet, PDF (173/498 Pages) Exar Corporation – 4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER

PRELIMINARY
XRT74L74
4 CHANNEL, ATM UNI/PPP DS3/E3 FRAMING CONTROLLER
REV. P1.1.1
RxUData[15:0]—Receive UTOPIA Data Bus Out-
puts
The ATM Layer Processor will read ATM cell data
from the Receive UTOPIA Interface block in a byte-
wide (or word-wide) manner, via these output pins.
The Receive UTOPIA Data bus can be configured to
operate in the “8 bit wide” or “16 bit wide” mode (See
Section 7.4.2.1.2). If the “8-bit wide” mode is selected,
then only the RxUData[7:0] output pins will be active
and capable of transmitting data. If the 16-bit wide
mode is selected, then all 16 output pins (e.g., RxU-
Data[15:0]) will be active. The Receive UTOPIA Data
bus is tri-stated while the active low RxUEn (Receive
UTOPIA Bus—Output Enable) input signal is “high”.
Therefore, the ATM Layer Processor must assert this
signal (e.g., toggle RxUEn low) in order to read the
ATM cell data from the Receive UTOPIA Interface
block. The data on the Receive UTOPIA Data Bus
output pins are updated on the rising edge of the Re-
ceive UTOPIA Interface block clock signal, RxUClk.
RxUAddr[4:0]—Receive UTOPIA Address Bus In-
puts
These input pins are used only when the UNI is oper-
ating in the Multi-PHY mode. Therefore, for more
information on the Receive UTOPIA Address Bus,
please see Section 7.4.2.2.2.2.
RxUClk—Receive UTOPIA Interface Block—Clock
Signal Input Pin
The Receive UTOPIA Interface block uses this signal
to update the data on the Receive UTOPIA Data Bus.
The Receive UTOPIA Interface block also uses this
signal to sample and latch the data on the Receive
UTOPIA Address bus pins (during Multi-PHY opera-
tion), into the Receive UTOPIA Interface block circuitry.
This clock signal can run at frequencies of 25 MHz,
33 MHz, or 50 MHz.
RxUEn—Receive UTOPIA Data Bus—Output
Enable Input
The Receive UTOPIA Data bus is tri-stated while this
input signal is negated. Therefore, the user must assert
this “active-low” signal (toggle it “low”) in order to read
the byte (or word) from the Receive UTOPIA Interface
block via the Receive UTOPIA Data bus.
RxUPrty—Receive UTOPIA—Odd Parity Bit
Output Pin
The Receive UTOPIA Interface Block will compute
the odd-parity of each byte (or word) of ATM cell data
that it will place on the Receive UTOPIA Data bus.
The Receive UTOPIA Data bus will output the value
of the computed parity bit at the RxUPrty output pin,
while the corresponding byte (or word) is present on
the Receive UTOPIA Data Bus. This features allows
the ATM Layer Processor to perform parity checking
on the data that it receives from the Receive UTOPIA
Interface Block.
RxUSoC—Receive UTOPIA—“Start of Cell”
Indicator Output Pin
The Receive UTOPIA Interface block will pulse this
output signal “high”, for one clock period of RxUClk,
when the first byte (or word) of a new cell is present
on the Receive UTOPIA Data Bus. This signal will be
“low” at all other times.
RxUClav/RxEmptyB*—RxFIFO Cell Available/
RxEmpty*
This output signal is used to alert the ATM Layer
Processor that the RxFIFO contains some ATM cell
data that is available for reading. Please see Section
7.4.2.2.1 for more information regarding this signal.
4.4.2.1.2 Selecting the UTOPIA Data Bus Width
The UTOPIA data bus width can be selected to be
either 8 or 16 bits by writing the appropriate data into
the UtWidth16 bit (bit 0) within the UTOPIA Configu-
ration Register, as shown below.
UTOPIA Configuration Register: (Address = 6Ah)
BIT 7
BIT 6
Unused
RO
BIT 5
Handshake Mode
R/W
BIT 4
M-PHY
R/W
BIT 3
CellOf52 Bytes
R/W
BIT 2
BIT 1
TFIFODepth[1, 0]
R/W
BIT 0
UtWidth16
R/W
If the user chooses a UTOPIA Data Bus width of
8 bits, then only the Receive UTOPIA Data output
pins: RxUData[7:0] will be active. (The output
pins:RxUData[15:8] will not be active). If the user
chooses a UTOPIA Data bus width of 16 bits, then all
of the Receive UTOPIA Data outputs: RxUData[15:0]
will be active. The following table relates the value of
Bit 0 (UtWidth) within the UTOPIA Configuration Reg-
ister, to the corresponding width of the UTOPIA Data
bus.
171