S6J3200 Datasheet, PDF (18/179 Pages) Cypress Semiconductor – 32-bit Microcontroller Traveo꽬 Family

3.2.1 Ethernet
The following functions are not supported.
Functions
External FIFO Interface
Additional Low Latency TX FIFO Interface for DMA configurations
MAC Transmit Block
- half-duplex
- collision
- back_pressure
MAC Filtering Block
- external address match
- Wakeup On Lan
Energy Efficient Ethernet support
LPI Operation in Cadence IP
PHY Interface
- GMII
- SGMII
- TBI
10/100/1000 Operation
- 1000 M
SGMII Operation
Jumbo Frames
Physical Control Sub-Layer
S6J3200 Series
Remark
Document Number: 002-05682 Rev.*A
Page 18 of 179