S6J3200 Datasheet, PDF (128/179 Pages) Cypress Semiconductor – 32-bit Microcontroller Traveo꽬 Family

S6J3200 Series
8.4.14 FPD-Link (LVDS)
Parameter
Output clock frequency
Differential output voltage
Variation of VOD
Common mode voltage
Variation of VCM
Cycle time of TXCLKP/M
Duty of TXCLKP/M
Channel to Channel skew
of TXOUTxP/M
Skew of TXOUTxP and
TXOUTxM
Output pulse position for
bit 0
Output pulse position for
bit 1
Output pulse position for
bit 2
Output pulse position for
bit 3
Output pulse position for
bit 4
Output pulse position for
bit 5
Output pulse position for
bit 6
Symbol
f
Conditions
-
VOD
delta VOD
VCM
delta VCM
TCIP
TCDT
TCSK
RL = 100
Ohm
-
-
-
Min
-
210
250
295
-
1.075
1.125
-
20
-
-
TDSK
-
-
T0
-0.25
T1
T/7 - 0.25
T2
2T/7 -
0.25
T3
f = 50MHz
3T/7 -
0.25
T4
4T/7 -
0.25
T5
5T/7 -
0.25
T6
6T/7 -
0.25
Value
Typ
-
300
350
400
-
1.200
1.250
-
T
4/7 * T
-
(Condition: See 8.2. Operation Assurance )
Max
50
390
450
505
25
1.325
1.375
25
1000
-
Unit
MHz
mV
mV
mV
mV
V
V
mV
ns
ns
Remarks
One of three is
selectable
One of three is
selectable
200
ps
-
50
ps
0
+0.25
ns
T/7
T/7 + 0.25 ns
2T/7
2T/7 +
0.25
ns
3T/7
3T/7 +
0.25
ns
4T/7
4T/7 +
0.25
ns
5T/7
5T/7 +
0.25
ns
6T/7
6T/7 +
0.25
ns
Note:
− All the corresponding ports of products which don't support FPD-Link should be connected to GND.
AVCC3_LVDS_PLL, AVSS3_LVDS_PLL, VCC3_LVDS_Tx, VSS3_LVDS_Tx, TxDOUTn+/-, TxCLK+/-.
Document Number: 002-05682 Rev.*A
Page 128 of 179