S6J3200 Datasheet, PDF (151/179 Pages) Cypress Semiconductor – 32-bit Microcontroller Traveo꽬 Family

S6J3200 Series
Figure 8-10: Coupling Capacitance (Example)
AVCC3_DAC
AVSS
AVSS
AVSS
C_R
C3
C_L
C4
DAC_R
C5
DAC_L
C6
Notes:
− C1: more than 10μF low ESR capacitors
− C2: 0.1μF ceramic capacitors
− C3, C4, C5, C6: 10μF low ESR capacitors
− Impedance of each power line must be as low as possible.
Notes:
− When DAC is not used in your system, the related pins should be
− AVCC3_DAC=GND and AVSS=GND
− C_L=OPEN and C_R=OPEN
− DAC_L=OPEN and DAC_R=OPEN
Low Noise Regulator
C1
C2
Post LPF/ Buffer
Post LPF/ Buffer
Document Number: 002-05682 Rev.*A
Page 151 of 179