S6J3200 Datasheet, PDF (17/179 Pages) Cypress Semiconductor – 32-bit Microcontroller Traveo꽬 Family

S6J3200 Series
Feature
HyperBus I/F
Stepper Motor Control
(SMC)
External Interrupt Capture
Unit (EICU)
Ethernet AVB
Description
ch.0: HyperBus as a MCU peripheral
ch.1: HyperBus on graphic subsystem
ch.2: HyperBus on graphic subsystem
The following register is not supported and cannot be used.
− Controller Status Register (HYPERBUSIn_CSR)
− Interrupt Status Register (HYPERBUSIn_ISR)
− Write Protection Register (HYPERBUSIn_WPR)
− Test Register (HYPERBUSIn_TEST)
GPO signal can only be used for "Internal Control example by GPO" in this product, that is, it can
select using HyperBus of PF or using HyperBus of Graphic Sub System.
See the "HyperBus Interface Port Configuration" of S6J3200 hardware manual in detail.
Each channel has 4 motor drivers with high output capability
See the platform manual in detail.
10/100 Mbps
MII-Interface
Supports Audio-Video Bridging (AVB)
ETHERNETn_revision_reg :
0x30070106 (Initial value) for revision B
ETHERNETn_designcfg_debug6 :
0x0302000E (Initial value)
MediaLB
LCD Controller
SHE
Source Clock Timer
Graphics Subsystem
See 0 in details.
MOST25 (512FS)
3 wires
Maximum 15ch is available.
TEQFP256 : 4com x 32seg
TEQFP216 : 4com x 32seg
TEQFP208 : 4com x 30seg
LCDC pins are initialized with Reset. (Stop LCDC alternating current output).
Duty and Static of segment output is supported. (SEG23/ST0, SEG24/ST1, SEG25/ST2,
SEG26/ST3, SEG27/ST4, SEG28/ST5, SEG29/ST6, SEG30/ST7, SEG31/ST8)
See the platform manual in detail.
See the platform manual in detail.
Variable setting about GDC clock. (Asynchronous with CPU clock)
Two drawing engines for “2D drawing” and “3D drawing”. Parallel processing support.
CPU can direct access to VRAM.
Programmable panel timing controller with RGB888 and RSDS support.
Note:
− The description of the preliminary documentation will be changed without any notification.
Document Number: 002-05682 Rev.*A
Page 17 of 179