S6J3200 Datasheet, PDF (16/179 Pages) Cypress Semiconductor – 32-bit Microcontroller Traveo꽬 Family

S6J3200 Series
Feature
Description
Sound Mixer
PCM-PWM
Audio DAC
I2S
The input channels of 0 - 4 are reserved for waveform generator.
Mixing different sampling frequency sounds.
Mixing Internal sounds and External I2S input sounds.
Saturating addition function for keeping sound quality.
Cut a specific frequency data by digital filter.
LPF is support by FIR filter.
Fade-in and Fade-out control.
Conversion of PCM audio streaming to Pulse Width Modulated signals.
Supports 2 output channels for stereo and mono data
Up to 16-bit output sample resolution
Support for half and full H-bridges
The sound source of the fixed 48kHz sampling frequency can be outputted.
1unit, L/R channels support.
BTL connection is available.
2ch.
− I2S0 can output sound sources which are processed by Sound System.
− I2S1 can input sound sources which are processed by Sound System.
− I2S has its own PPU, but the function is fixed to disable.
See the "Sound System Configuration" of S6J3200 hardware manual in detail.
See the platform manual in detail.
Base Timer
Reload Timer
I/O Timer
Quad Position & Revolution
Counter
(Up/Down Counter)
A unit consists of a pair of 16bit base timers. 12 units, that is, 24 channels of base timers are
available.
See the platform manual in detail.
See the platform manual in detail.
See the platform manual in detail.
See the platform manual in detail.
Multi-functional Serial
(MFS)
2 ports of MFS only support I²C.
Note
− Not all pins support I2C. Only pins which have the I2C I/O characteristics support it. See the datasheet in detail.
The availability of chip select function can be seen at Function Digit Table.
Chip Select Input is not supported.
CTS/RTS is not mounted (hardware flow control is not supported for this series.)
CAN-FD
Real Time Clock (RTC)
with Auto-calibration
DDR High Speed SPI
WUCR function is not supported for this product.
Flexible data rate is supported.
16KB/ch of message RAM is available.
The clock output from CAN pre-scaler is supplied to every CAN. ECC error generation function of
the message RAM is not supported for this device. Therefore CAN FD ECC Error Insertion Control
Register (FDFECR) is not writeable.
See the platform manual in detail
See the platform manual in detail.
ch.0: HSSPI as a MCU peripheral
ch.1: HSSPI on graphic subsystem
See the platform manual in detail
Document Number: 002-05682 Rev.*A
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