S6J3200 Datasheet, PDF (167/179 Pages) Cypress Semiconductor – 32-bit Microcontroller Traveo꽬 Family

S6J3200 Series
Summary
Error
Correct
ID
Operating temperature
TA: -40(min), +105(max)
TC: -40(min), +144(max)
Case Temperature
64, 65
issue
Main clock
15
frequency
Revision
11
description
CPU Clock
11
Maximum
Operating temperature
TA: -40(min), +105(max)
80, 81
Main and sub oscillator is available.
− A wide range of 3.6 - 4MHz is available for 17
main oscillator
-
12
200MHz (CPU Clock of function digit A, B,
13
C, and D)
Notes:
− Both rating of TA and TC should
simultaneously be satisfied as maximum
operation temperature.
− The following condition should be
satisfied in order to facilitate heat
dissipation.
1. 4 or more layers PCB should be used.
2. The area of PCB should be 114.3 mm
#283
x 76.2 mm or more, and the thickness
should be 1.6 mm or more. (JEDEC
standard)
3. 1 layer of middle layers at least should
be used for dedicated layer to radiate heat
with residual copper rate 90% or more.
The layer can be used for system ground.
4. 35~50% of the die stage area which is
exposed at back surface of package
should be soldered to a part of 1st layer.
5. The part of 1st layer should be
connected to the dedicated heat radiation
layer with more than 10 thermal via holes.
Main and sub oscillator is available.
− A wide range of 3.6 - 16MHz is available #311
for main oscillator
(Inside Figure 2-1: Option and Part
Number)
C: Support MCAN 3.0.1.
#313
D: Support MCAN 3.2.
160MHz (CPU Clock of function digit A, B,
#314
C, and D)
Maximum gap
between package 24
-
and board
Note:− Same size is specified for MIN,
39
NOM, MAX, then it should be regarded as #315
maximum size.
Document Number: 002-05682 Rev.*A
Page 167 of 179