AK4558EN Datasheet, PDF (91/94 Pages) Asahi Kasei Microsystems – 108dB 216kHz 32Bit CODEC with PLL

[AK4558]
1. Grounding and Power Supply Decoupling
To minimize coupling by digital noise, decoupling capacitors should be connected to each AVDD and
TVDD. AVDD is supplied from analog supply in system and TVDD is supplied from digital supply in
system. Power lines of AVDD and TVDD should be distributed separately from the point with low
impedance of regulator etc. The power up sequence between AVDD and TVDD is not critical. VSS1 and
VSS2 must be connected to the same analog ground plane. Decoupling capacitors for high frequency
should be placed as near as possible to the supply pin.
2. Voltage Reference
The voltage of AVDD sets the analog input/output range. Connect a 0.1µF ceramic capacitor between
the AVDD pin and the VSS1 pin in parallel with a 10µF electric capacitor. VCOM is a signal ground for
this device. A 1.0F ceramic capacitor attached between the VCOM pin and the VSS1 pin eliminates the
effects of high frequency noise. Do not connect the VCOM pin with an external circuit. No load current
may be drawn from this pin. All signals, especially clocks, should be kept away from the AVDD, TVDD
and VCOM pins in order to avoid unwanted noise coupling into the AK4558.
3. Analog Input
The ADC inputs is single-ended and biased to VCOM voltage (AVDD/2) internally by 8kΩ (typ @
fs=48kHz, 96kHz, 192kHz). The inputs signal range scales with AVDD nominally at 0.8 x AVDD Vpp
(typ). The output code format is 2's complement. Input DC offset (including DC offset of the ADC
itself) is canceled by an integrated high-pass filter.
The AK4558 samples the analog input at 128fs (@fs=48kHz), 64fs (@fs=96kHz) or 32fs
(@fs=192kHz). A digital filter removes the noise over the stopband attenuation level, except for a
band of integral multiplication of the sampling frequency. The AK4558 has an integrated anti-alias
RC filter in order to reduce the noise around the sampling frequency.
4. Analog Outputs
The DAC output is single-ended and output range is 0.76 x AVDD Vpp (typ) centered on VCOM. The
input data format is two’s compliment. The output voltage is positive full scale for 7FFFFFH (@24-bit
data) and negative full scale for 800000H (@24-bit data). The ideal output is VCOM for 000000H
(@24bit). The Out-of-Band noise (shaping noise) generated by the internal delta-sigma modulator
should be attenuated by an external filter if the noise becomes problem.
DC offsets on analog outputs are eliminated by AC coupling since analog outputs has DC offset of
VCOM.
015004500-E-02
- 91 -
2015/09