AK4558EN Datasheet, PDF (58/94 Pages) Asahi Kasei Microsystems – 108dB 216kHz 32Bit CODEC with PLL

[AK4558]
LRCK
Mode23 27
LRCK
Mode17 21
BICK (256fs)
SDTI
Mode17 23
SDTI
Mode21 27
SDTO
Mode17 23
SDTO
Mode21 27
256 BICK
23 0
23 0
23 0
23 0
23 0
23 0
23 0
23 0
23
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31
23 0
23 0
23 0
23 0
23 0
23 0
23 0
23 0
23
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31
L1
R1
L2
R2
L3
R3
L4
R4
32 BICK 32 BICK 32 BICK 32 BICK 32 BICK 32 BICK 32 BICK 32 BICK
Figure 35. Mode 17/21/23/27 Timing (TDM256 mode, I²S Compatible)
LRCK
Mode24 25
LRCK
Mode18 19
BICK (256fs)
SDTI
Mode18 24
SDTI
Mode19 25
SDTO
Mode18 24
SDTO
Mode19 25
256 BICK
23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23
31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22
31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
0 31 30
L1
R1
L2
R2
L3
R3
L4
R4
32 BICK 32 BICK 32 BICK 32 BICK 32 BICK 32 BICK 32 BICK 32 BICK
Figure 36. Mode 18/19/24/25 Timing (TDM256 mode, LSB justified)
015004500-E-02
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2015/09