AK4558EN Datasheet, PDF (72/94 Pages) Asahi Kasei Microsystems – 108dB 216kHz 32Bit CODEC with PLL

[AK4558]
1-3. External Clock Mode (Slave Mode)
(CKS3-2 pins = “L L” or “L H” or “H L”)
Power Supply
PDN pin
Internal PDN
MCKI pin
BICK pin
LRCK pin
(1)
(2)
1ms (min) (LDOE=”L”), 10ms (min) (LDOE=”H”)
(3)
(4)
(4)
Input
Input
Example:
:^{Audio I/F Format: 32bit I2S (ADC & DAC)}
Input MCKI frequency: 256fsn
Sampling Frequency: 44.1kHz
(1) Power Supply & PDN pin = “L”  “H”
(3)
(PS pin=”L”) Addr:03H, Data:38H
Addr:04H, Data:00H
(PS pin=”H”) CKS3-0 pins= “LHLH” or“LHHH”
MCKI, BICK and LRCK input
Figure 55. Clock Set Up Sequence (3)
<Sequence>
(1) After Power Up: PDN pin “L” → “H”
“L” time of 150ns or more is needed to reset the AK4558.
(2) Control register settings become available in 10ms (min.) when LDOE pin = “H”, or 1ms
(min.) when LDOE pin = “L”, after the PDN pin “L” → “H”. The power-up time of VCOM will be
2ms (max.) after the PDN pin “L” → “H” if the external capacitor is 1μF±50%.
(3) DIF2-0, DFS1-0 and ACKS bits must be set during this period.
(4) Normal operation starts after MCKI, LRCK and BICK are supplied.
015004500-E-02
- 72 -
2015/09