AK4558EN Datasheet, PDF (84/94 Pages) Asahi Kasei Microsystems – 108dB 216kHz 32Bit CODEC with PLL

[AK4558]
■ Register Map
Addr Register Name
D7
D6
D5
D4
D3
D2
D1
D0
00H Power Management
0
0
0
PMADR PMADL PMDAR PMDAL RSTN
01H PLL Control
0
0
0
PLL3 PLL2 PLL1 PLL0 PMPLL
02H DAC TDM
0
0
0
0
0
0
SDS1 SDS0
03H Control 1
TDM1 TDM0 DIF2 DIF1 DIF0 ATS1 ATS0 SMUTE
04H Control 2
0
0
0
MCKS1 MCKS0 DFS1 DFS0 ACKS
05H Mode Control
0
FS3
FS2
FS1
FS0 BCKO1 BCKO0 LOPS
06H Filter setting
FIRDA2 FIRDA1 FIRDA0 SLDA SDDA SSLOW DEM1 DEM0
07H HPF Enable, Filter setting
0
0
0
0
SLAD SDAD HPFER HPFEL
08H LOUT Volume Control
ATL7 ATL6 ATL5 ATL4 ATL3 ATL2 ATL1 ATL0
09H ROUT Volume Control
ATR7 ATR6 ATR5 ATR4 ATR3 ATR2 ATR1 ATR0
Note 42. Address 0AH and 1FH are a read only register. The bits defined as 0 must contain a “0” value.
When the PDN pin goes to “L”, the registers are initialized to their default values. When RSTN
bit goes to “0”, the internal timing is reset, but registers are not initialized to their default values.
■ Register Definitions
Addr Register Name
D7 D6 D5
D4
D3
D2
D1
D0
00H Power Management 0
0
0 PMADR PMADL PMDAR PMDAL RSTN
R/W
RD RD RD R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
1
RSTN: Internal Timing Reset
0: Reset Register values are not reset.
1: Normal Operation (default)
PMDAL/R: DAC L/Rch Power Management
0: DAC L/Rch Power Down (default)
1: Normal Operation
PMADL/R: ADC L/Rch Power Management
0: ADC L/Rch Power Down (default)
1: Normal Operation
Addr
01H
Register Name
PLL Control
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
PLL3 PLL2 PLL1
PLL0
PMPLL
RD RD RD R/W R/W R/W R/W
R/W
0
0
0
0
0
1
0
0
PMPLL: PLL Power Management
0: EXT Mode and Power down (default)
1: PLL Mode and Power up
PLL3-0: PLL Reference Clock Select (Table 16)
Default: “0010” (BICK pin=64fs)
015004500-E-02
- 84 -
2015/09