AK4558EN Datasheet, PDF (80/94 Pages) Asahi Kasei Microsystems – 108dB 216kHz 32Bit CODEC with PLL

7. Power down
AVDD/TVDD
PDN pin
LDOE pin
VDD18 pin
Internal PDN
(1)
(2)
[AK4558]
Figure 66. Power Down Sequence (LDOE pin= “L”)
AVDD/TVDD
(1)
PDN pin
LDOE pin
(2)
Internal PDN
VDD18 pin
Figure 67. Power Down Sequence (LDOE pin= “H”)
Note:
(1) The PDN pin must be held to “L” for 150 ns after power up AVDD and TVDD.
(2) When the LDOE pin = “L”, the internal shutdown switch is ON after power up the AK4558.
Internal circuit will be powered up after the shutdown switch is ON (1 ms max.). When the LDOE
pin = “H”, the internal LDO is powered up after the AK4558 is powered up. The internal circuit will
be powered up (10 ms max.) after the shutdown switch is ON following internal oscillator
count-up.
During this period, digital output and digital in/output pins may output an instantaneous pulse
(max. 1us). Therefore, referring the output of digital pins and data transmission with a device
on the same 3-wire serial/I²C bus as the AK4558 should be avoided in this period to prevent
system errors.
015004500-E-02
- 80 -
2015/09