AK4558EN Datasheet, PDF (55/94 Pages) Asahi Kasei Microsystems – 108dB 216kHz 32Bit CODEC with PLL

[AK4558]
(2)TDM128 Mode (Quad Mode)
By setting TDM1-0 bits = “01” and SDS1-0 bits, four channel outputs can be supported at maximum. The
SDTI input data of the AK4558 #1 and #2 can be selected as DAC TDM data by SDS1-0 bits (Table 24).
256fs
48kHz
256fs
AK4558 #1
MCKI
SDTI
LRCK CAD1-0
BICK ^=00H LOUT
ROUT
4ch TDM
AK4558 #2
MCKI
SDTI
LRCK CAD1-0
BICK ^=01H LOUT
ROUT
Figure 32. Cascade TDM128 Connection Diagram
LRCK
BICK(128fs)
128 BICK
SDTI 1,2
SDTI#1 (i)
SDTI#2 (i)
31 30 29 28 4 3 2 1 0 31 30 29 28 4 3 2 1 0 31 30 29 28 4 3 2 1 0 31 30 29 28 4 3 2 1 0 31 30
DATA1
32 BICK
DATA2
32 BICK
DATA3
32 BICK
DATA4
32 BICK
31 30 29 28 4 3 2 1 0 31 30 29 28 4 3 2 1 0
31 30
L (Data1)
32 BICK
R (Data2)
32 BICK
31 30 29 28 4 3 2 1 0 31 30 29 28 4 3 2 1 0 31 30
L (Data3)
32 BICK
R (Data4)
32 BICK
Figure 33. Cascade TDM Timing (Mode 32; TDM128 mode, MSB justified, Slave mode)
015004500-E-02
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2015/09