AK4558EN Datasheet, PDF (38/94 Pages) Asahi Kasei Microsystems – 108dB 216kHz 32Bit CODEC with PLL

[AK4558]
■ Serial Mode (PS pin= “L”)
EXT Mode (PMPLL bit = “0”)
The external clocks which are required to operate the AK44558 in slave mode are MCKI, LRCK and
BICK. MCKI should be synchronized with LRCK but the phase is not critical. There are two methods to
set MCKI frequency; Manual Setting Mode and Auto Setting Mode. In Manual Setting Mode (ACKS bit=
“0”: Default), the sampling speed is set by DFS0 and DFS1 bits (Table 8). The frequency of MCKI at each
sampling speed is set automatically. (Table 10, Table 11, Table 12). In Auto Setting Mode (ACKS bit=
“1”), as MCKI frequency is detected automatically (Table 13) and the internal master clock attains the
appropriate frequency (Table 14), so it is not necessary to set DFS.
In master mode, only MCKI is required. Master Clock Input Frequency should be set with the MCKS1-0
bits (Table 9), and the sampling speed should be set by the DFS1-0 bits (Table 8). The frequencies and
the duties of the clocks (LRCK, BICK) are not stable immediately after setting MCKS1-0 bits and DFS1-0
bits up. After exiting reset upon power-up in master mode, the AK4558 is in power-down mode until MCKI
is input.
After exiting reset upon power-up in slave mode, the AK4558 is in power-down mode until MCKI, LRCK
and BICK are input.
If the clock is stopped, click noise occurs when restarting the clock. Mute the digital output externally.
DFS1 DFS0
Sampling Speed Mode (fs)
0
0
Normal Speed Mode
8kHz~54kHz
(default)
0
1
Double Speed Mode 48kHz~108kHz
1
0
Quad Speed Mode 96kHz~216kHz
1
1
Quad Speed Mode 96kHz~216kHz
Table 8. Sampling Speed (Manual Setting Mode)
MCKS1 MCKS0
Normal
Double
Quad Speed
Speed Mode Speed Mode
Mode
0
0
256fs
256fs
128fs
0
1
384fs
256fs
128fs
1
0
512fs
256fs
128fs
1
1
768fs
256fs
128fs
Table 9. Master Clock Input Frequency Select (Master Mode)
(default)
LRCK
MCKI (MHz)
BICK (MHz)
fs
256fs
384fs
512fs
768fs
64fs
8.0kHz
2.0480
3.0720
4.0960
6.1440
0.5120
32.0kHz
8.1920 12.2880 16.3840
24.5760
2.0480
44.1kHz 11.2896 16.9344 22.5792
33.8688
2.8224
48.0kHz 12.2880 18.4320 24.5760
36.8640
3.0720
Table 10. System Clock Example (Normal Speed Mode @Manual Setting Mode)
015004500-E-02
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2015/09