AK4558EN Datasheet, PDF (20/94 Pages) Asahi Kasei Microsystems – 108dB 216kHz 32Bit CODEC with PLL

[AK4558]
16. Switching Characteristics
(Ta= -40  +105C; AVDD= 2.4 ~ 3.6V; TVDD=1.7 ~ 3.6V; C_L=20pF)
Parameter
Symbol
Min.
PLL Master Mode (PLL Reference Clock = MCKI pin)
MCKI Input Timing
Frequency
fCLK
Pulse Width Low
tCLKL
Pulse Width High
tCLKH
LRCK Output Timing
Frequency
fsn, fsd, fsq
Stereo Mode: Duty Cycle
Duty
TDM128 Mode: (Note 19)
11.2896
0.4/fCLK
0.4/fCLK
-
-
I²S compatible: Pulse Width Low
tLRCKL
-
MSB or LSB justified: Pulse Width High tLRCKH
-
TDM256 Mode: (Note 19)
I²S compatible: Pulse Width Low
tLRCKL
-
MSB or LSB justified: Pulse Width High tLRCKH
-
BICK Output Timing (Table 21)
Period BCKO1-0 bits = “00”
tBCK
-
BCKO1-0 bits = “01”
tBCK
-
BCKO1-0 bits = “10”
tBCK
-
BCKO1-0 bits = “11”
tBCK
-
Typ.
-
-
-
Table 19
50
1/(8fsn)
1/(8fsd)
1/(8fsn)
1/(8fsd)
1/(4fsq)
1/(4fsq)
1/(32fs)
1/(64fs)
1/(128fsn)
1/(128fsd)
1/(256fsn)
Max.
27
-
-
-
-
-
-
-
-
-
-
-
-
Unit
MHz
s
s
kHz
%
s
s
s
s
s
s
s
s
TDM Mode (Note 19)
tBCK
1/(256fsn)
-
1/(256fsd)
-
s
1/(128fsq)
Duty Cycle
dBCK
-
50
-
%
Note 19. In TDM modes, TVDD=3.0V~3.6V. The AK4558 does not support variable pitch mode.
015004500-E-02
- 20 -
2015/09