XC5VLX110T-2FFG1738I Datasheet, PDF (9/91 Pages) Xilinx, Inc – Virtex-5 FPGA Packaging and Pinout Specification

Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
LVPECL DC Specifications (LVPECL_25)
These values are valid when driving a 100Ω differential load only, i.e., a 100Ω resistor between the two receiver pins. The
V_OH levels are 200 mV below standard LVPECL levels and are compatible with devices tolerant of lower common-mode
ranges. Table 11 summarizes the DC output specifications of LVPECL. For more information on using LVPECL, see UG190:
Virtex-5 FPGA User Guide, Chapter 6, SelectIO Resources.
Table 11: LVPECL DC Specifications
Symbol
DC Parameter
Min
V_OH
V_OL
V_ICM
V_IDIFF
Output High Voltage
Output Low Voltage
Input Common-Mode Voltage
Differential Input Voltage^(1,2)
V_CC – 1.025
V_CC – 1.81
0.6
0.100
Notes:
1. Recommended input maximum voltage not to exceed V_CCO + 0.2V.
2. Recommended input minimum voltage not to go below –0.5V.
Typ
1.545
0.795
Max
V_CC – 0.88
V_CC – 1.62
2.2
1.5
Units
V
V
V
V
PowerPC 440 Switching Characteristics
Consult the Embedded Processor Block in Virtex-5 FPGAs Reference Guide for further information.
Table 12: Processor Block Switching Characteristics
Clock Name
Description
CPMC440CLK
CPMINTERCONNECTCLK
CPMPPCS0PLBCLK
CPMPPCS1PLBCLK
CPMPPCMPLBCLK
CPMMCCLK
CPMFCMCLK
CPMDCRCLK
CPMDMA0LLCLK
CPMDMA1LLCLK
CPMDMA2LLCLK
CPMDMA3LLCLK
JTGC440TCK
CPMC440TIMERCLOCK
CPU clock
Xbar clock
Slave 0 PLB clock⁽¹⁾
Slave 1 PLB clock⁽¹⁾
Master PLB clock⁽¹⁾
Memory interface clock⁽¹⁾⁽²⁾
FCM clock⁽¹⁾
FPGA logic DCR clock⁽¹⁾
DMA0 LL clock⁽¹⁾
DMA1 LL clock⁽¹⁾
DMA2 LL clock⁽¹⁾
DMA3 LL clock⁽¹⁾
JTAG clock
Timer clock
Speed Grade
-3
-2
-1
550
475
400
366.6
316.6
266.6
183.3
158.3
133.3
183.3
158.3
133.3
183.3
158.3
133.3
366.6
316.6
266.6
275
237.5
200
183.3
158.3
133.3
250
250
200
250
250
200
250
250
200
250
250
200
50
50
50
275
237.5
200
Notes:
1. Typical bus frequencies are provided for reference only, actual frequencies are user-design dependent.
2. Refer to DS567 for maximum clock speed of designs using the DDR2 Memory Controller for PowerPC® 440 Processors.
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
DS202 (v5.3) May 5, 2010
www.xilinx.com
Product Specification
9