XC5VLX110T-2FFG1738I Datasheet, PDF (12/91 Pages) Xilinx, Inc – Virtex-5 FPGA Packaging and Pinout Specification

Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
Table 21: Processor Block DCR Switching Characteristics
Clock Name
Description
Reference Clock
Clock-to-out and setup relative to clock
T_{CK_CONTROL}
T_{CK_ADDRESS}
T_{CK_DATA}
T_{CONTROL_CK}
T_{ADDRESS_CK}
T_{DATA_CK}
CPMDCRCLK
CPMDCRCLK
CPMDCRCLK
CPMDCRCLK
CPMDCRCLK
CPMDCRCLK
Table 22: Processor Block FCM Switching Characteristics
Clock Name
Description
Reference Clock
Clock-to-out and setup relative to clock
T_{CK_CONTROL}
T_{CK_DATA}
T_{CK_INSTRUCTION}
T_{CONTROL_CK}
T_{DATA_CK}
T_{RESULT_CK}
CPMFCMCLK
CPMFCMCLK
CPMFCMCLK
CPMFCMCLK
CPMFCMCLK
CPMFCMCLK
Table 23: Processor Block MISC Switching Characteristics
Clock Name
Description
Reference Clock
Clock-to-out and setup relative to clock
T_{CK_CONTROL}
T_{CK_ADDRESS}
T_{CK_DATA}
T_{CONTROL_CK}
T_{ADDRESS_CK}
T_{DATA_CK}
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
Speed Grade
-3
-2
-1
Units
Speed Grade
-3
-2
-1
Units
0.967
1.084
1.324
ps
1.041
1.158
1.4
ps
0.701
0.818
1.06
ps
1.057
1.218
1.395
ps
0.608
0.698
0.768
ps
0.608
0.698
0.768
ps
Speed Grade
-3
-2
-1
Units
DS202 (v5.3) May 5, 2010
www.xilinx.com
Product Specification
12