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XC5VLX110T-2FFG1738I Datasheet, PDF (59/91 Pages) Xilinx, Inc – Virtex-5 FPGA Packaging and Pinout Specification
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
Table 78: Input Clock Tolerances
Symbol
Description
Frequency Range
Value Units
Duty Cycle Input Tolerance (in %)
TDUTYCYCRANGE_1
PSCLK only
TDUTYCYCRANGE_1_50
PSCLK and CLKIN
TDUTYCYCRANGE_50_100
TDUTYCYCRANGE_100_200
TDUTYCYCRANGE_200_400
TDUTYCYCRANGE_400
Input Clock Cycle-Cycle Jitter (Low Frequency Mode)
TCYCLFDLL
TCYCLFFX
CLKIN (using DLL outputs)(1)
CLKIN (using DFS outputs)(2)
Input Clock Cycle-Cycle Jitter (High Frequency Mode)
TCYCHFDLL
TCYCHFFX
CLKIN (using DLL outputs)(1)
CLKIN (using DFS outputs)(2)
Input Clock Period Jitter (Low Frequency Mode)
TPERLFDLL
TPERLFFX
CLKIN (using DLL outputs)(1)
CLKIN (using DFS outputs)(2)
Input Clock Period Jitter (High Frequency Mode)
TPERHFDLL
TPERHFFX
CLKIN (using DLL outputs)(1)
CLKIN (using DFS outputs)(2)
Feedback Clock Path Delay Variation
< 1 MHz
25 - 75
1 - 50 MHz
25 - 75
50 - 100 MHz
30 - 70
100 - 200 MHz
200 - 400 MHz(4)
40 - 60
45 - 55
> 400 MHz
45 - 55
Speed Grade
-3
-2
-1
300.00
300.00
345.00
300.00
300.00
345.00
%
%
%
%
%
%
Units
ps
ps
150.00
150.00
173.00
ps
150.00
150.00
173.00
ps
1.00
1.00
1.15
ns
1.00
1.00
1.15
ns
1.00
1.00
1.15
ns
1.00
1.00
1.15
ns
TCLKFB_DELAY_VAR
CLKFB off-chip feedback
1.00
1.00
1.15
ns
Notes:
1. DLL Outputs are used in these instances to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
2. DFS Outputs are used in these instances to describe the outputs: CLKFX and CLKFX180.
3. If both DLL and DFS outputs are used, follow the more restrictive specifications.
4. This duty cycle specification does not apply to the GTP_DUAL to DCM or GTX_DUAL to DCM connection. The GTP transceivers drive the
DCMs at the following frequencies: 320 MHz for -1 speed grade devices, 375 MHz for -2 speed grade devices, or 375 MHz for -3 speed
grade devices. The GTX transceivers drive the DCMs at the following frequencies: 450 MHz for -1 speed grade devices or 500 MHz for -2
speed grade devices.
DS202 (v5.3) May 5, 2010
www.xilinx.com
Product Specification
59