XC5VLX110T-2FFG1738I Datasheet, PDF (27/91 Pages) Xilinx, Inc – Virtex-5 FPGA Packaging and Pinout Specification

Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
Table 51: Analog-to-Digital Specifications (Cont’d)
Parameter
External Reference Inputs⁽⁴⁾
Symbol
Comments/Conditions
Min Typ Max
Units
Positive Reference Input
Voltage Range
V_REFP
Measured Relative to V_REFN
2.45 2.5 2.55
Volts
Negative Reference Input
Voltage Range
V_REFN
Measured Relative to AGND
–50
0
100
mV
Input current
Power Requirements
I_REF
ADCCLK = 5.2 MHz
100
µA
Analog Power Supply
Analog Supply Current
AV_DD
AI_DD
Measured Relative to AV_SS
ADCCLK = 5.2 MHz
2.45 2.5 2.55
5
13
Volts
mA
Notes:
1. Offset and gain errors are removed by enabling the System Monitor automatic gain calibration feature. See UG192: Virtex-5 FPGA System
Monitor User Guide.
2. See "System Monitor Timing" in UG192: Virtex-5 FPGA System Monitor User Guide.
3. See "Analog Inputs" in UG192: Virtex-5 FPGA System Monitor User Guide for a detailed description.
4. Any variation in the reference voltage from the nominal V_REFP = 2.5V and V_REFN = 0V will result is a deviation from the ideal transfer
function.This also impacts the accuracy of the internal sensor measurements (i.e., temperature and power supply). However, for external
ratiometric type applications allowing the supply voltage and reference to vary by ±2% is permitted.
DS202 (v5.3) May 5, 2010
www.xilinx.com
Product Specification
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