DS566 Datasheet, PDF (7/38 Pages) Xilinx, Inc – PLBV46 Master

PLBV46 Master (v1.00a)
Figure Top x-ref 2
IP Client Read Command Interface (synchronous to PLB Bus clock)
Read
Command
To PLBV46
Master
IP2Bus_MstRd_Req
IP2Bus_MstRd_Addr[0:Param]
IP2Bus_MstRd_Length[0:Param]
IP2Bus_MstRd_BE[0:Param]
IP2Bus_MstRd_Size[0:1]
IP2Bus_MstRd_Type
IP2Bus_MstRd_Lock
IP2Bus_MstRd_Reset
Read
Status
Reply
From
PLBV46
Master
Bus2IP_MstRd_CmdAck
Bus2IP_MstRd_Cmplt
Bus2IP_MstRd_Error
Bus2IP_MstRd_Rearbitrate
Bus2IP_MstRd_Timeout
Bus2IP_MstRd_Length_is_Zero
Figure 2: IP Client Read Command Interface Signal Set
DS566_02_033009
Figure Top x-ref 3
IP Client Write Command Interface (synchronous to PLB Bus clock)
Write
Command
To PLB
MasterV46
IP2Bus_MstWr_Req
IP2Bus_MstWr_Addr[0:Param]
IP2Bus_ MstWr _Length[0:Param]
IP2Bus_ MstWr _BE[0:Param]
IP2Bus_ MstWr _Size[0:1]
IP2Bus_ MstWr _Type
IP2Bus_ MstWr _Lock
IP2Bus_ MstWr _Reset
Write
Status
Reply
From
PLBV46
Master
Bus2IP_ MstWr _CmdAck
Bus2IP_ MstWr _Cmplt
Bus2IP_ MstWr _Error
Bus2IP_ MstWr _Rearbitrate
Bus2IP_ MstWr _Timeout
Bus2IP_ MstWr _Length_is_Zero
Figure 3: IP Client Write Command Interface Signal Set
DS566_03_033009
DS566 April 24, 2009
www.xilinx.com
7
Product Specification