DS581 Datasheet, PDF (2/50 Pages) Xilinx, Inc – PLB interface with byte enable support

XPS External Peripheral Controller (EPC) v1.02a
Functional Description
The XPS External Peripheral Controller (XPS EPC) interface diagram shown in Figure 1 depicts the
overall interfaces of the core design.
Figure Top x-ref 1
FPGA
XPS EPC
PLB
Interface
Module
IPIC
Interface ^EPC_CORE
External
Peripheral
Interface
External
Peripheral
Device 1
Figure 1: XPS EPC Interface Diagram
External
Peripheral
Device 4
DS581_01_080309
The XPS EPC IP Core design provides a general purpose interface to external peripheral devices and
the PLB. It is a PLB slave device. The XPS EPC IP Core can be configured to provide support for
multiple external peripherals (non-memory peripherals like USB, LAN etc.) up to a maximum of four
devices and each device is independently configured to respond either in synchronous or in
asynchronous mode. The timing parameters governing the access cycles such as setup/hold time, cycle
access time, cycle recovery time, etc. are configured by the user. It receives read or write operation
commands from the PLB and generates a corresponding access cycle to one of the four peripheral
devices. It is recommended that peripherals like LAN, USB which have embedded interface should be
used with the core.
The XPS EPC IP Core is comprised of the following modules:
• PLB Interface Module
• EPC CORE
PLB Interface Module
The PLB Interface Module provides an interface between the EPC CORE and the PLB. The PLB
interface module implements the basic functionality of the PLB interface operation and does the
necessary protocol and timing translation between the PLB and the IPIC interface.
EPC CORE
The EPC CORE provides an interface between the IPIC interface and the external peripheral devices.
The EPC CORE consists of the logic necessary to convert the access cycles on the IPIC interface to the
corresponding access cycles on the peripheral bus adhering to the device specific timing parameters.
The block diagram for the XPS EPC is shown in Figure 2.
2
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DS581 September 16, 2009
Product Specification