DS581 Datasheet, PDF (1/50 Pages) Xilinx, Inc – PLB interface with byte enable support

DS581 September 16, 2009
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XPS External Peripheral
Controller (EPC) v1.02a
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Product Specification
Introduction
This specification defines the architecture and interface
requirements for the External Peripheral Controller
(XPS EPC IP Core). The controller supports data
transfers between the Processor Local Bus (PLB V4.6)
and the external synchronous and/or asynchronous
peripheral devices such as USB and LAN devices.
Examples of peripheral devices supported by the XPS
EPC include the 10/100 non-PCI Ethernet single chip
(SMSC LAN91C111) from SMSC and CY7C67300 USB
Controller from Cypress Semiconductor devices.
Features
• Connects as a 32-bit slave on PLB V4.6 buses of
32-bit, 64-bit or 128-bit
• PLB interface with byte enable support
• Parameterized support of up to four external
peripheral devices with each device configured
with separate base address and high address range
• Supports both synchronous and asynchronous
access modes of peripheral devices with the support
for a separate clock domain for synchronous
peripheral devices
• Supports both multiplexed and non-multiplexed
address and data buses
• The data width of peripheral devices is
independently configured to 8-bit, 16-bit or 32-bit
with the provision to enable data width matching
when the PLB data width is greater than that of
peripheral device
• Configurable timing parameters for peripheral bus
interface
LogiCORE™ Facts
Core Specifics
Supported
Device Family
Virtex-4®, Virtex-4Q, Virtex-4QV,
Virtex-5, Virtex-5FX, Virtex-6,
Virtex-6CX, Spartan®-3E, Automotive
Spartan-3E, Spartan-3, Automotive
Spartan-3, Spartan-3A, Automotive
Spartan-3A, Spartan-3A DSP,
Automotive Spartan-3A DSP,
Spartan-6
Version of Core
xps_epc
v1.02a
Resources Used
Min
Max
Slices
LUTs
FFs
Refer to
Table 5, Table 6, Table 7 and Table 8
Provided with Core
Documentation Product Specification
Design File
Formats
VHDL
Constraints File N/A
Verification
N/A
Instantiation
Template
N/A
Design Tool Requirements
Xilinx
Implementation
Tools
ISE® 11.3 or later
Verification
Mentor Graphics ModelSim v6.4b or
later
Simulation
Mentor Graphics ModelSim v6.4b or
later
Synthesis
XST 11.3or later
Support
Provided by Xilinx, Inc.
© 2007-2009 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and
other countries. All other trademarks are the property of their respective owners.
DS581 September 16, 2009
www.xilinx.com
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Product Specification