DS581 Datasheet, PDF (19/50 Pages) Xilinx, Inc – PLB interface with byte enable support

XPS External Peripheral Controller (EPC) v1.02a
XPS EPC Design Considerations
The XPS EPC IP Core is PLB slave device. It receives read or write instructions from the processor and
generates a corresponding access cycle on the peripheral interface. Examples of read and write accesses
are illustrated in the Timing Diagrams section. The user must take the following considerations into
account while designing with the XPS EPC.
How to Provide the Timing Parameters in Async Mode of Operation?
Internally in the XPS EPC IP Core, the timing parameters are inter-related and some calculation is done
based upon the values provided by the user. These values and internal calculations are as follows. In
case of asynchronous mode of operation following parameters are used. These parameters are,-
- C_PRHx_ADDR_TSU - address set up time
- C_PRHx_ADDR_TH - address hold time
- C_PRHx_ADS_WIDTH - address strobe width
- C_PRHx_CSN_TSU - chip select set up time
- C_PRHx_CSN_TH - chip select hold time
- C_PRHx_WRN_WIDTH - write control width time
- C_PRHx_WR_CYCLE - write cycle time i.e. time between two consecutive writes
- C_PRHx_DATA_TSU - data set up time
- C_PRHx_DATA_TH - data hold time
- C_PRHx_RDN_WIDTH - read control width time
- C_PRHx_RD_CYCLE - read cycle time i.e. time between two consecutive reads
- C_PRHx_DATA_TOUT - time taken by the data to be out at read condition
- C_PRHx_DATA_TINV - data line tri-state after the read control signal is de-activated
- C_PRHx_RDY_TOUT - time for device ready signal to go high, once device is selected
- C_PRHx_RDY_WIDTH - maximum time till the XPS EPC IP Core can wait for device to be ready
How these parameters are linked in the design?
Address hold time - This parameter is calculated as,
(C_PRHx_ADDR_TH/C_BUS_CLOCK_PERIOD_PS)
Chip select/Data/Address hold time - Three parameters are used to calculate the hold time as,
((max2(max2(C_PRHx_DATA_TH,C_PRHx_CSN_TH),C_PRHx_ADDR_TH)/
C_BUS_CLOCK_PERIOD_PS)
Read control signal width time - This parameter is calculated as,
(C_PRHx_RDN_WIDTH/C_BUS_CLOCK_PERIOD_PS)
Write control signal width time - This parameter is calculated as,
(C_PRHx_WRN_WIDTH/C_BUS_CLOCK_PERIOD_PS)
Address strobe signal width time - Three parameters are used to calculate the address strobe width as,
((max2(max2(C_PRHx_ADDR_TSU, C_PRHx_ADS_WIDTH), C_PRHx_CSN_WIDTH)/
C_BUS_CLOCK_PERIOD_PS)
DS581 September 16, 2009
www.xilinx.com
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Product Specification