GC5018_06 Datasheet, PDF (90/134 Pages) Texas Instruments – 8-CHANNEL WIDEBAND RECEIVER

GC5018
8-CHANNEL WIDEBAND RECEIVER
SLWS169A – MAY 2005 – REVISED NOVEMBER 2005
4.4.4.33 RAGC2_CONFIG0 Register
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Register name: RAGC2_CONFIG0
BIT 15
0
0
0
BIT 7
hp_corner_2(2:0)
0
0
0
Page: 0x1860 Address: 0x20
ragc_sync_delay_2(7:0)
0
0
0
0
acc_shift_2(4:0)
0
0
0
0
BIT 8
0
BIT 0
0
ragc_sync_delay_2(7:0) : The input sync to the receive AGC block is delayed by this value of samples.
hp_corner_2(2:0) : This sets the corner frequency of the High Pass filter. Larger values result in higher
corner frequencies.
acc_shift_2(4:0) : Selects the integrated power measurements result bits to be used as the error lookup
table address. A larger number means fewer samples will have to be integrated to achieve
the same result.
4.4.4.34 RAGC2_CONFIG1 Register
Register name: RAGC2_CONFIG1
BIT 15
0
BIT 7
0
0
err_shift_2(2:0)
0
acc_offset_2(5:0)
0
0
0
0
Page: 0x1860 Address: 0x21
0
0
delay_adj_2(4:0)
0
0
BIT 8
err_shift_2(4:3)
0
0
BIT 0
0
0
acc_offset_2(5:0) : Constant subtracted from the integrated power measurement result before the error
lookup table.
err_shift_2(4:0) : Controls the loop gain by left shifting the error output. Larger values result in higher
gain..
delay_adj_2(4:0) : Sets the delay difference, in samples, between the DVGA outputs and the value
applied to the sample multiplier.
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GC5018 GENERAL CONTROL