GC5018_06 Datasheet, PDF (2/134 Pages) Texas Instruments – 8-CHANNEL WIDEBAND RECEIVER

GC5018
8-CHANNEL WIDEBAND RECEIVER
SLWS169A – MAY 2005 – REVISED NOVEMBER 2005
www.ti.com
2 General Description
The GC5018 is a multi-channel communications signal processor that provides digital downconversion
optimized for cellular base transceiver systems. The device supports UMTS, CDMA-1X and TD-SCDMA
air interface cellular standards.
The chip provides up to 8 UMTS digital downconverter channels (DDC), 16 CDMA DDCs or 16
TD-SCDMA DDCs. The DDC channels are independent and operate simultaneously.
The GC5018 has four 16-bit inputs. Each DDC channel can be programmed to accept data from any one
(or two for complex input mode) of the four input ports.
dvga_b dvga_d
dvga_a dvga_c
6666
16
16
Digital receive
data ports
16
16
rxin_a
adcclk_a
rxin_b
adcclk_b
rxin_c
adcclk_c
rxin_d
adcclk_d
trst_n
tck
tdi
tms
JTAG
tdo
Receive Input
Interface
Power
Measurements
and
Wideband
ACG
4
rx_sync a−d
reset_n
Control and Sync
interrupt
rx_sync_out
16
6
d(15:0) a(5:0) rd_n wr_n ce_n
rxclk
DDC0
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC1
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC2
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC3
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC4
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC5
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC6
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
DDC7
2 CDMA2000−1X,
2 TD−SCDMA or 1 UMTS
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
I
Q
sync
32
Output
Format
Parallel
8
or Serial
rxout_X_X
rx_sync_out_X
rxclk_out
Figure 2-1. Functional Block Diagram
3 RECEIVE DIGITAL SIGNAL PROCESSING
The down conversion section of the GC5018 consists of the receive input interface, the rx_distribution
bus, and 8 digital downconverter blocks.
The purpose of the receive input interface is to accept signal data from four 16 bit input ports, measure the
input signal power, control the digital VGA and to distribute the data to the DDC blocks. The input
interface also has a user-controlled test generator and noise source.
The rx_distribution bus distributes the four channels of signal data to each of the 8 DDC blocks.
2
General Description